Evaluation of the Many-core System
Learn how to design and evaluate a many-core key-value store system focused on improving power efficiency and throughput. This lesson explains the use of the TilePro64 processor, modifications to Memcached for parallelism, and trade-offs in latency and power consumption compared to x86 processors. Understand the challenges and benefits of domain-specific processors in system design, including handling hotspots and workload distribution.
We'll cover the following...
Power efficiency
We wanted power efficiency to be able to decrease the cost of running a key-value store while increasing its throughput. We also wanted to be more power efficient than the key-value stores running on the x86 architecture processors.
With the TilePro64, our system can handle roughly three times the transactions per second per watt compared to x86 processors because of the higher throughput and lower power consumption. To make a more power-efficient system, we've increased its throughput and decreased its power consumption using many but slower and hence less power-hungry cores.
Higher throughput
To increase the power efficiency, we had to improve the performance of our system. The performance metric we chose was the system's throughput (and latency, which we will discuss a bit later in the lesson).
We used a processor with a higher number of low-powered cores to achieve higher throughput despite having slower cores. Then, we used an optimized version of Memcached to take advantage of the higher number of cores, which reduced the reliance on ...