Simulator

Understand how various page replacement policies operate through hands-on simulation. Learn to configure address patterns, cache sizes, and policies like LRU, FIFO, and CLOCK while exploring their impact on virtual memory performance.

We'll cover the following...

This simulator, paging-policy.py, allows you to play around with different page-replacement policies. For example, let’s examine how LRU performs with a series of page references with a cache of size 3:

  0 1 2 0 1 3 0 3 1 2 1

To do so, run the simulator as follows:

prompt> ./paging-policy.py --addresses=0,1,2,0,1,3,0,3,1,2,1 --policy=LRU --cachesize=3 -c

And what you would see is:

ARG addresses 0,1,2,0,1,3,0,3,1,2,1
ARG numaddrs 10
ARG policy LRU
ARG cachesize 3
ARG maxpage 10
ARG seed 0

Solving...
    
Access: 0 MISS LRU->      [br 0]<-MRU Replace:- [br Hits:0 Misses:1]
Access: 1 MISS LRU->   [br 0, 1]<-MRU Replace:- [br Hits:0 Misses:2]
Access: 2 MISS LRU->[br 0, 1, 2]<-MRU Replace:- [br Hits:0 Misses:3]
Access: 0 HIT  LRU->[br 1, 2, 0]<-MRU Replace:- [br Hits:1 Misses:3]
Access: 1 HIT  LRU->[br 2, 0, 1]<-MRU Replace:- [br Hits:2 Misses:3]
Access: 3 MISS LRU->[br 0, 1, 3]<-MRU Replace:2 [br Hits:2 Misses:4]
Access: 0 HIT  LRU->[br 1, 3,

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